Changeset 919 for trunk/patches/2.6.22
- Timestamp:
- 10/11/07 05:24:05 (2 years ago)
- Files:
-
- trunk/patches/2.6.22/41-ixp4xx-net-drivers.patch (modified) (14 diffs)
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trunk/patches/2.6.22/41-ixp4xx-net-drivers.patch
r917 r919 47 47 +obj-$(CONFIG_IXP4XX_NPE) += ixp4xx_npe.o 48 48 diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c 49 index c03adda..a1917bd10064449 index ec4f079..aa58669 100644 50 50 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c 51 51 +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c … … 834 834 diff --git a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c 835 835 new file mode 100644 836 index 0000000.. b9e9bd6836 index 0000000..4c6b36d 837 837 --- /dev/null 838 838 +++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c 839 @@ -0,0 +1,27 3@@839 @@ -0,0 +1,274 @@ 840 840 +/* 841 841 + * Intel IXP4xx Queue Manager driver for Linux … … 848 848 + */ 849 849 + 850 +#include <linux/ioport.h> 850 851 +#include <linux/interrupt.h> 851 852 +#include <linux/kernel.h> 852 +#include < asm/io.h>853 +#include <linux/module.h> 853 854 +#include <asm/arch/qmgr.h> 854 855 + … … 1140 1141 diff --git a/drivers/net/arm/ixp4xx_eth.c b/drivers/net/arm/ixp4xx_eth.c 1141 1142 new file mode 100644 1142 index 0000000.. ed8c1501143 index 0000000..6ce609f 1143 1144 --- /dev/null 1144 1145 +++ b/drivers/net/arm/ixp4xx_eth.c 1145 @@ -0,0 +1,12 17@@1146 @@ -0,0 +1,1258 @@ 1146 1147 +/* 1147 1148 + * Intel IXP4xx Ethernet driver for Linux … … 1202 1203 +#define MDIO_INTERVAL (3 * HZ) 1203 1204 +#define MAX_MDIO_RETRIES 100 /* microseconds, typically 30 cycles */ 1205 +#define MAX_MII_RESET_RETRIES 100 /* mdio_read() cycles, typically 4 */ 1204 1206 +#define MAX_CLOSE_WAIT 1000 /* microseconds, typically 2-3 cycles */ 1205 1207 + … … 1313 1315 + u32 desc_tab_phys; 1314 1316 + int id; /* logical port ID */ 1317 + u16 mii_bmcr; 1315 1318 +}; 1316 1319 + … … 1456 1459 +} 1457 1460 + 1461 +static void phy_reset(struct net_device *dev, int phy_id) 1462 +{ 1463 + struct port *port = netdev_priv(dev); 1464 + int cycles = 0; 1465 + 1466 + mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr | BMCR_RESET); 1467 + 1468 + while (cycles < MAX_MII_RESET_RETRIES) { 1469 + if (!(mdio_read(dev, phy_id, MII_BMCR) & BMCR_RESET)) { 1470 +#if DEBUG_MDIO 1471 + printk(KERN_DEBUG "%s: phy_reset() took %i cycles\n", 1472 + dev->name, cycles); 1473 +#endif 1474 + return; 1475 + } 1476 + udelay(1); 1477 + cycles++; 1478 + } 1479 + 1480 + printk(KERN_ERR "%s: MII reset failed\n", dev->name); 1481 +} 1482 + 1458 1483 +static void eth_set_duplex(struct port *port) 1459 1484 +{ … … 1467 1492 + 1468 1493 + 1469 +static void mdio_thread(struct work_struct *work) 1470 +{ 1471 + struct port *port = container_of(work, struct port, mdio_thread.work); 1472 + 1473 + if (mii_check_media(&port->mii, 1, 0)) 1494 +static void phy_check_media(struct port *port, int init) 1495 +{ 1496 + if (mii_check_media(&port->mii, 1, init)) 1474 1497 + eth_set_duplex(port); 1475 1498 + if (port->mii.force_media) { /* mii_check_media() doesn't work */ … … 1478 1501 + int prev_link = netif_carrier_ok(dev); 1479 1502 + 1480 + if ( cur_link && !prev_link) {1503 + if (!prev_link && cur_link) { 1481 1504 + printk(KERN_INFO "%s: link up\n", dev->name); 1482 1505 + netif_carrier_on(dev); … … 1486 1509 + } 1487 1510 + } 1511 +} 1512 + 1513 + 1514 +static void mdio_thread(struct work_struct *work) 1515 +{ 1516 + struct port *port = container_of(work, struct port, mdio_thread.work); 1517 + 1518 + phy_check_media(port, 0); 1488 1519 + schedule_delayed_work(&port->mdio_thread, MDIO_INTERVAL); 1489 1520 +} … … 2059 2090 + } 2060 2091 + 2092 + mdio_write(dev, port->plat->phy, MII_BMCR, port->mii_bmcr); 2093 + 2061 2094 + memset(&msg, 0, sizeof(msg)); 2062 2095 + msg.cmd = NPE_VLAN_SETRXQOSENTRY; … … 2122 2155 + __raw_writel(DEFAULT_RX_CNTRL0, &port->regs->rx_control[0]); 2123 2156 + 2124 + if (mii_check_media(&port->mii, 1, 1)) 2125 + eth_set_duplex(port); 2157 + phy_check_media(port, 1); 2126 2158 + eth_set_mcast_list(dev); 2127 2159 + netif_start_queue(dev); … … 2215 2247 + dev->name); 2216 2248 + 2249 + port->mii_bmcr = mdio_read(dev, port->plat->phy, MII_BMCR) & 2250 + ~(BMCR_RESET | BMCR_PDOWN); /* may have been altered */ 2251 + mdio_write(dev, port->plat->phy, MII_BMCR, 2252 + port->mii_bmcr | BMCR_PDOWN); 2253 + 2217 2254 + if (!ports_open) 2218 2255 + qmgr_disable_irq(TXDONE_QUEUE); … … 2303 2340 + port->mii.reg_num_mask = 0x1F; 2304 2341 + 2305 + INIT_DELAYED_WORK(&port->mdio_thread, mdio_thread);2306 +2307 2342 + printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy, 2308 2343 + npe_name(port->npe)); 2344 + 2345 + phy_reset(dev, plat->phy); 2346 + port->mii_bmcr = mdio_read(dev, plat->phy, MII_BMCR) & 2347 + ~(BMCR_RESET | BMCR_PDOWN); 2348 + mdio_write(dev, plat->phy, MII_BMCR, port->mii_bmcr | BMCR_PDOWN); 2349 + 2350 + INIT_DELAYED_WORK(&port->mdio_thread, mdio_thread); 2309 2351 + return 0; 2310 2352 +
