root/trunk/patches/2.6.22/12-velocity-BE.patch
| Revision 833, 28.4 kB (checked in by blaster8, 3 years ago) |
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linux-2.6.22-rc1-arm/drivers/net/via-velocity.c
old new 96 96 MODULE_LICENSE("GPL"); 97 97 MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"); 98 98 99 /* Valid values for vdebug (additive, this is a bitmask): 100 * 0x00 => off 101 * 0x01 => always on 102 * 0x02 => additional detail on tx (rx, too, if anyone implements same) 103 * 0x04 => detail the initialization process 104 * 0x08 => spot debug detail; to be used as developers see fit 105 */ 106 static int vdebug = 0; 107 108 /* HAIL - these macros are for the normal 0x01-type tracing... */ 109 #define HAIL(S) \ 110 if (vdebug&1) printk(KERN_NOTICE "%s\n", (S)); 111 #define HAILS(S,T) \ 112 if (vdebug&1) printk(KERN_NOTICE "%s -> status=0x%x\n", (S), (T)); 113 99 114 #define VELOCITY_PARAM(N,D) \ 100 115 static int N[MAX_UNITS]=OPTION_DEFAULT;\ 101 116 module_param_array(N, int, NULL, 0); \ 102 117 MODULE_PARM_DESC(N, D); 103 118 119 #define VELO_DEBUG_MIN 0 120 #define VELO_DEBUG_MAX 255 121 #define VELO_DEBUG_DEF 0 122 VELOCITY_PARAM(velo_debug, "Debug level"); 123 104 124 #define RX_DESC_MIN 64 105 125 #define RX_DESC_MAX 255 106 126 #define RX_DESC_DEF 64 … … 385 405 if (val == -1) 386 406 *opt = def; 387 407 else if (val < min || val > max) { 388 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE " %s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",389 devname,name, min, max);408 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "via-velocity: the value of parameter %s is invalid, the valid range is (%d-%d)\n", 409 name, min, max); 390 410 *opt = def; 391 411 } else { 392 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO " %s: set value of parameter %s to %d\n",393 devname,name, val);412 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "via-velocity: set value of parameter %s to %d\n", 413 name, val); 394 414 *opt = val; 395 415 } 396 416 } … … 415 435 if (val == -1) 416 436 *opt |= (def ? flag : 0); 417 437 else if (val < 0 || val > 1) { 418 printk(KERN_NOTICE " %s: the value of parameter %s is invalid, the valid range is (0-1)\n",419 devname,name);438 printk(KERN_NOTICE "via-velocity: the value of parameter %s is invalid, the valid range is (0-1)\n", 439 name); 420 440 *opt |= (def ? flag : 0); 421 441 } else { 422 printk(KERN_INFO " %s: set parameter %s to %s\n",423 devname,name, val ? "TRUE" : "FALSE");442 printk(KERN_INFO "via-velocity: set parameter %s to %s\n", 443 name, val ? "TRUE" : "FALSE"); 424 444 *opt |= (val ? flag : 0); 425 445 } 426 446 } … … 438 458 static void __devinit velocity_get_options(struct velocity_opt *opts, int index, char *devname) 439 459 { 440 460 461 velocity_set_int_opt(&opts->velo_debug, velo_debug[index], VELO_DEBUG_MIN, VELO_DEBUG_MAX, VELO_DEBUG_DEF, "velo_debug", devname); 441 462 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname); 442 463 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname); 443 464 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname); … … 452 473 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname); 453 474 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname); 454 475 opts->numrx = (opts->numrx & ~3); 476 vdebug = opts->velo_debug; 455 477 } 456 478 457 479 /** … … 466 488 { 467 489 struct mac_regs __iomem * regs = vptr->mac_regs; 468 490 491 HAIL("velocity_init_cam_filter"); 492 469 493 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */ 470 494 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, ®s->MCFG); 471 495 WORD_REG_BITS_ON(MCFG_VIDFR, ®s->MCFG); … … 484 508 WORD_REG_BITS_ON(MCFG_RTGOPT, ®s->MCFG); 485 509 486 510 mac_set_cam(regs, 0, (u8 *) & (vptr->options.vid), VELOCITY_VLAN_ID_CAM); 487 vptr->vCAMmask[0] |= 1;488 mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM);489 511 } else { 490 512 u16 temp = 0; 491 513 mac_set_cam(regs, 0, (u8 *) &temp, VELOCITY_VLAN_ID_CAM); 492 temp = 1;493 mac_set_cam_mask(regs, (u8 *) &temp, VELOCITY_VLAN_ID_CAM);494 514 } 515 vptr->vCAMmask[0] |= 1; 516 mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM); 495 517 } 496 518 497 519 /** … … 508 530 struct mac_regs __iomem * regs = vptr->mac_regs; 509 531 int i; 510 532 533 HAIL("velocity_rx_reset"); 511 534 vptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0; 512 535 513 536 /* 514 537 * Init state, all RD entries belong to the NIC 515 538 */ 516 539 for (i = 0; i < vptr->options.numrx; ++i) 517 vptr->rd_ring[i].rdesc0.owner = OWNED_BY_NIC; 540 /* vptr->rd_ring[i].rdesc0.owner = OWNED_BY_NIC; BE */ 541 vptr->rd_ring[i].rdesc0 |= cpu_to_le32(BE_OWNED_BY_NIC); /* BE */ 518 542 519 543 writew(vptr->options.numrx, ®s->RBRDU); 520 544 writel(vptr->rd_pool_dma, ®s->RDBaseLo); … … 537 561 struct mac_regs __iomem * regs = vptr->mac_regs; 538 562 int i, mii_status; 539 563 564 if (vdebug&5) printk(KERN_NOTICE "velocity_init_registers: entering\n"); 565 540 566 mac_wol_reset(regs); 541 567 542 568 switch (type) { 543 569 case VELOCITY_INIT_RESET: 544 570 case VELOCITY_INIT_WOL: 545 571 572 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: RESET or WOL\n"); 546 573 netif_stop_queue(vptr->dev); 547 574 548 575 /* … … 570 597 571 598 case VELOCITY_INIT_COLD: 572 599 default: 600 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: COLD or default\n"); 573 601 /* 574 602 * Do reset 575 603 */ 576 604 velocity_soft_reset(vptr); 605 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: soft reset complete.\n"); 577 606 mdelay(5); 578 579 607 mac_eeprom_reload(regs); 580 608 for (i = 0; i < 6; i++) { 581 609 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i])); … … 593 621 */ 594 622 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), ®s->CFGB); 595 623 624 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: Initializing CAM filter\n"); 596 625 /* 597 626 * Init CAM filter 598 627 */ 628 if (vdebug&8) printk(KERN_NOTICE "velocity: spot debug: about to init CAM filters\n"); 629 mdelay(5); /* MJW - ARM processors, kernel 2.6.19 - this fixes oopses and hangs */ 599 630 velocity_init_cam_filter(vptr); 631 if (vdebug&8) printk(KERN_NOTICE "velocity: spot debug: init CAM filters complete\n"); 600 632 633 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: Setting packet filter\n"); 601 634 /* 602 635 * Set packet filter: Receive directed and broadcast address 603 636 */ … … 607 640 * Enable MII auto-polling 608 641 */ 609 642 enable_mii_autopoll(regs); 643 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: enable_mii_autopoll complete.\n"); 610 644 611 645 vptr->int_mask = INT_MASK_DEF; 612 646 613 writel(cpu_to_le32(vptr->rd_pool_dma), ®s->RDBaseLo); 647 /* writel(cpu_to_le32(vptr->rd_pool_dma), ®s->RDBaseLo); BE */ 648 writel((vptr->rd_pool_dma), ®s->RDBaseLo); /* BE */ 614 649 writew(vptr->options.numrx - 1, ®s->RDCSize); 615 650 mac_rx_queue_run(regs); 616 651 mac_rx_queue_wake(regs); … … 618 653 writew(vptr->options.numtx - 1, ®s->TDCSize); 619 654 620 655 for (i = 0; i < vptr->num_txq; i++) { 621 writel(cpu_to_le32(vptr->td_pool_dma[i]), &(regs->TDBaseLo[i])); 656 /* writel(cpu_to_le32(vptr->td_pool_dma[i]), &(regs->TDBaseLo[i])); BE */ 657 writel((vptr->td_pool_dma[i]), &(regs->TDBaseLo[i])); /* BE */ 622 658 mac_tx_queue_run(regs, i); 623 659 } 624 660 661 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: DMA settings complete.\n"); 662 625 663 init_flow_control_register(vptr); 626 664 627 665 writel(CR0_STOP, ®s->CR0Clr); … … 640 678 641 679 enable_flow_control_ability(vptr); 642 680 mac_hw_mibs_init(regs); 681 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: Set interrupt mask\n"); 643 682 mac_write_int_mask(vptr->int_mask, regs); 644 683 mac_clear_isr(regs); 684 if (vdebug&4) printk(KERN_NOTICE "velocity_init_registers: complete.\n"); 645 685 646 686 } 647 687 } … … 659 699 struct mac_regs __iomem * regs = vptr->mac_regs; 660 700 int i = 0; 661 701 702 HAIL("velocity_soft_reset"); 662 703 writel(CR0_SFRST, ®s->CR0Set); 663 704 664 705 for (i = 0; i < W_MAX_TIMEOUT; i++) { … … 722 763 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION); 723 764 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n"); 724 765 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n"); 766 printk(KERN_INFO "BE support, misc. fixes MJW 01Jan2007 - may be unstable\n"); 725 767 first = 0; 726 768 } 727 769 … … 935 977 dma_addr_t pool_dma; 936 978 u8 *pool; 937 979 980 HAIL("velocity_init_rings"); 938 981 /* 939 982 * Allocate all RD/TD rings a single pool 940 983 */ … … 997 1040 static void velocity_free_rings(struct velocity_info *vptr) 998 1041 { 999 1042 int size; 1043 HAIL("velocity_free_rings"); 1000 1044 1001 1045 size = vptr->options.numrx * sizeof(struct rx_desc) + 1002 1046 vptr->options.numtx * sizeof(struct tx_desc) * vptr->num_txq; … … 1013 1057 struct mac_regs __iomem *regs = vptr->mac_regs; 1014 1058 int avail, dirty, unusable; 1015 1059 1060 HAIL("velocity_give_many_rx_descs"); 1016 1061 /* 1017 1062 * RD number must be equal to 4X per hardware spec 1018 1063 * (programming guide rev 1.20, p.13) … … 1026 1071 dirty = vptr->rd_dirty - unusable; 1027 1072 for (avail = vptr->rd_filled & 0xfffc; avail; avail--) { 1028 1073 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1; 1029 vptr->rd_ring[dirty].rdesc0.owner = OWNED_BY_NIC; 1074 /* vptr->rd_ring[dirty].rdesc0.owner = OWNED_BY_NIC; BE */ 1075 vptr->rd_ring[dirty].rdesc0 |= cpu_to_le32(BE_OWNED_BY_NIC); /* BE */ 1030 1076 } 1031 1077 1032 1078 writew(vptr->rd_filled & 0xfffc, ®s->RBRDU); … … 1036 1082 static int velocity_rx_refill(struct velocity_info *vptr) 1037 1083 { 1038 1084 int dirty = vptr->rd_dirty, done = 0, ret = 0; 1085 HAIL("velocity_rx_refill"); 1039 1086 1040 1087 do { 1041 1088 struct rx_desc *rd = vptr->rd_ring + dirty; 1042 1089 1043 1090 /* Fine for an all zero Rx desc at init time as well */ 1044 if (rd->rdesc0.owner == OWNED_BY_NIC) 1091 /* if (rd->rdesc0.owner == OWNED_BY_NIC) BE */ 1092 if (rd->rdesc0 & cpu_to_le32(BE_OWNED_BY_NIC)) /* BE */ 1045 1093 break; 1046 1094 1047 1095 if (!vptr->rd_info[dirty].skb) { … … 1076 1124 unsigned int rsize = sizeof(struct velocity_rd_info) * 1077 1125 vptr->options.numrx; 1078 1126 1127 HAIL("velocity_init_rd_ring"); 1079 1128 vptr->rd_info = kmalloc(rsize, GFP_KERNEL); 1080 1129 if(vptr->rd_info == NULL) 1081 1130 goto out; … … 1105 1154 { 1106 1155 int i; 1107 1156 1157 HAIL("velocity_free_rd_ring"); 1108 1158 if (vptr->rd_info == NULL) 1109 1159 return; 1110 1160 … … 1146 1196 unsigned int tsize = sizeof(struct velocity_td_info) * 1147 1197 vptr->options.numtx; 1148 1198 1199 HAIL("velocity_init_td_ring"); 1149 1200 /* Init the TD ring entries */ 1150 1201 for (j = 0; j < vptr->num_txq; j++) { 1151 1202 curr = vptr->td_pool_dma[j]; … … 1182 1233 struct velocity_td_info * td_info = &(vptr->td_infos[q][n]); 1183 1234 int i; 1184 1235 1236 HAIL("velocity_free_td_ring_entry"); 1185 1237 if (td_info == NULL) 1186 1238 return; 1187 1239 … … 1211 1263 { 1212 1264 int i, j; 1213 1265 1266 HAIL("velocity_free_td_ring"); 1214 1267 for (j = 0; j < vptr->num_txq; j++) { 1215 1268 if (vptr->td_infos[j] == NULL) 1216 1269 continue; … … 1238 1291 struct net_device_stats *stats = &vptr->stats; 1239 1292 int rd_curr = vptr->rd_curr; 1240 1293 int works = 0; 1294 u16 wRSR; /* BE */ 1241 1295 1296 HAILS("velocity_rx_srv", status); 1242 1297 do { 1243 1298 struct rx_desc *rd = vptr->rd_ring + rd_curr; 1244 1299 1245 1300 if (!vptr->rd_info[rd_curr].skb) 1246 1301 break; 1247 1302 1248 if (rd->rdesc0.owner == OWNED_BY_NIC) 1303 /* if (rd->rdesc0.owner == OWNED_BY_NIC) BE */ 1304 if (rd->rdesc0 & cpu_to_le32(BE_OWNED_BY_NIC)) /* BE */ 1249 1305 break; 1250 1306 1251 1307 rmb(); 1252 1308 1309 wRSR = (u16)(cpu_to_le32(rd->rdesc0)); /* BE */ 1253 1310 /* 1254 1311 * Don't drop CE or RL error frame although RXOK is off 1255 1312 */ 1256 if ((rd->rdesc0.RSR & RSR_RXOK) || (!(rd->rdesc0.RSR & RSR_RXOK) && (rd->rdesc0.RSR & (RSR_CE | RSR_RL)))) { 1313 /* if ((rd->rdesc0.RSR & RSR_RXOK) || (!(rd->rdesc0.RSR & RSR_RXOK) && (rd->rdesc0.RSR & (RSR_CE | RSR_RL)))) { BE */ 1314 if ((wRSR & RSR_RXOK) || (!(wRSR & RSR_RXOK) && (wRSR & (RSR_CE | RSR_RL)))) { /* BE */ 1257 1315 if (velocity_receive_frame(vptr, rd_curr) < 0) 1258 1316 stats->rx_dropped++; 1259 1317 } else { 1260 if (rd->rdesc0.RSR & RSR_CRC) 1318 /* if (rd->rdesc0.RSR & RSR_CRC) BE */ 1319 if (wRSR & RSR_CRC) /* BE */ 1261 1320 stats->rx_crc_errors++; 1262 if (rd->rdesc0.RSR & RSR_FAE) 1321 /* if (rd->rdesc0.RSR & RSR_FAE) BE */ 1322 if (wRSR & RSR_FAE) /* BE */ 1263 1323 stats->rx_frame_errors++; 1264 1324 1265 1325 stats->rx_dropped++; 1266 1326 } 1267 1327 1268 rd->inten = 1; 1328 /* rd->inten = 1; BE */ 1329 rd->ltwo |= cpu_to_le32(BE_INT_ENABLE); /* BE */ 1269 1330 1270 1331 vptr->dev->last_rx = jiffies; 1271 1332 … … 1296 1357 1297 1358 static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb) 1298 1359 { 1360 u8 bCSM; 1361 HAIL("velocity_rx_csum"); 1299 1362 skb->ip_summed = CHECKSUM_NONE; 1300 1363 1301 if (rd->rdesc1.CSM & CSM_IPKT) { 1302 if (rd->rdesc1.CSM & CSM_IPOK) { 1303 if ((rd->rdesc1.CSM & CSM_TCPKT) || 1304 (rd->rdesc1.CSM & CSM_UDPKT)) { 1305 if (!(rd->rdesc1.CSM & CSM_TUPOK)) { 1364 // if (rd->rdesc1.CSM & CSM_IPKT) { 1365 // if (rd->rdesc1.CSM & CSM_IPOK) { 1366 // if ((rd->rdesc1.CSM & CSM_TCPKT) || 1367 // (rd->rdesc1.CSM & CSM_UDPKT)) { 1368 // if (!(rd->rdesc1.CSM & CSM_TUPOK)) { 1369 bCSM = (u8)(cpu_to_le32(rd->rdesc1) >> 16); /* BE */ 1370 if (bCSM & CSM_IPKT) { 1371 if (bCSM & CSM_IPOK) { 1372 if ((bCSM & CSM_TCPKT) || 1373 (bCSM & CSM_UDPKT)) { 1374 if (!(bCSM & CSM_TUPOK)) { /* BE */ 1306 1375 return; 1307 1376 } 1308 1377 } … … 1328 1397 { 1329 1398 int ret = -1; 1330 1399 1400 HAIL("velocity_rx_copy"); 1331 1401 if (pkt_size < rx_copybreak) { 1332 1402 struct sk_buff *new_skb; 1333 1403 1404 HAIL("velocity_rx_copy (working...)"); 1334 1405 new_skb = dev_alloc_skb(pkt_size + 2); 1335 1406 if (new_skb) { 1336 1407 new_skb->dev = vptr->dev; … … 1361 1432 static inline void velocity_iph_realign(struct velocity_info *vptr, 1362 1433 struct sk_buff *skb, int pkt_size) 1363 1434 { 1435 HAIL("velocity_iph_realign"); 1364 1436 /* FIXME - memmove ? */ 1365 1437 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) { 1366 1438 int i; 1367 1439 1440 HAIL("velocity_iph_realign (working...)"); 1368 1441 for (i = pkt_size; i >= 0; i--) 1369 1442 *(skb->data + i + 2) = *(skb->data + i); 1370 1443 skb_reserve(skb, 2); … … 1383 1456 static int velocity_receive_frame(struct velocity_info *vptr, int idx) 1384 1457 { 1385 1458 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int); 1459 u16 pkt_len; /* BE */ 1460 u16 wRSR; /* BE */ 1461 struct sk_buff *skb; 1386 1462 struct net_device_stats *stats = &vptr->stats; 1387 1463 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]); 1388 1464 struct rx_desc *rd = &(vptr->rd_ring[idx]); 1389 int pkt_len = rd->rdesc0.len; 1390 struct sk_buff *skb; 1465 /* int pkt_len = rd->rdesc0.len BE */; 1466 1467 pkt_len = ((cpu_to_le32(rd->rdesc0) >> 16) & 0x00003FFFUL); /* BE */ 1468 wRSR = (u16)(cpu_to_le32(rd->rdesc0)); /* BE */ 1391 1469 1392 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) { 1470 HAIL("velocity_receive_frame"); 1471 /* if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) { BE */ 1472 if (wRSR & (RSR_STP | RSR_EDP)) { /* BE */ 1393 1473 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name); 1394 1474 stats->rx_length_errors++; 1395 1475 return -EINVAL; 1396 1476 } 1397 1477 1398 if (rd->rdesc0.RSR & RSR_MAR) 1478 /* if (rd->rdesc0.RSR & RSR_MAR) BE */ 1479 if (wRSR & RSR_MAR) /* BE */ 1399 1480 vptr->stats.multicast++; 1400 1481 1401 1482 skb = rd_info->skb; … … 1408 1489 */ 1409 1490 1410 1491 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) { 1411 if (rd->rdesc0.RSR & RSR_RL) { 1492 /* if (rd->rdesc0.RSR & RSR_RL) { BE */ 1493 if (wRSR & RSR_RL) { /* BE */ 1412 1494 stats->rx_length_errors++; 1413 1495 return -EINVAL; 1414 1496 } … … 1452 1534 struct rx_desc *rd = &(vptr->rd_ring[idx]); 1453 1535 struct velocity_rd_info *rd_info = &(vptr->rd_info[idx]); 1454 1536 1537 HAIL("velocity_alloc_rx_buf"); 1455 1538 rd_info->skb = dev_alloc_skb(vptr->rx_buf_sz + 64); 1456 1539 if (rd_info->skb == NULL) 1457 1540 return -ENOMEM; … … 1469 1552 */ 1470 1553 1471 1554 *((u32 *) & (rd->rdesc0)) = 0; 1472 rd->len = cpu_to_le32(vptr->rx_buf_sz);1473 rd->inten = 1;1555 /* rd->len = cpu_to_le32(vptr->rx_buf_sz); BE */ 1556 /* rd->inten = 1; BE */ 1474 1557 rd->pa_low = cpu_to_le32(rd_info->skb_dma); 1475 rd->pa_high = 0; 1558 /* rd->pa_high = 0; BE */ 1559 rd->ltwo &= cpu_to_le32(0xC000FFFFUL); /* BE */ 1560 rd->ltwo |= cpu_to_le32((vptr->rx_buf_sz << 16)); /* BE */ 1561 rd->ltwo |= cpu_to_le32(BE_INT_ENABLE); /* BE */ 1562 rd->ltwo &= cpu_to_le32(0xFFFF0000UL); /* BE */ 1476 1563 return 0; 1477 1564 } 1478 1565 … … 1493 1580 int full = 0; 1494 1581 int idx; 1495 1582 int works = 0; 1583 u16 wTSR; /* BE */ 1496 1584 struct velocity_td_info *tdinfo; 1497 1585 struct net_device_stats *stats = &vptr->stats; 1498 1586 1587 HAILS("velocity_tx_srv", status); 1499 1588 for (qnum = 0; qnum < vptr->num_txq; qnum++) { 1500 1589 for (idx = vptr->td_tail[qnum]; vptr->td_used[qnum] > 0; 1501 1590 idx = (idx + 1) % vptr->options.numtx) { … … 1506 1595 td = &(vptr->td_rings[qnum][idx]); 1507 1596 tdinfo = &(vptr->td_infos[qnum][idx]); 1508 1597 1509 if (td->tdesc0.owner == OWNED_BY_NIC) 1598 /* if (td->tdesc0.owner == OWNED_BY_NIC) BE */ 1599 if (td->tdesc0 & cpu_to_le32(BE_OWNED_BY_NIC)) /* BE */ 1510 1600 break; 1511 1601 1512 1602 if ((works++ > 15)) 1513 1603 break; 1514 1604 1515 if (td->tdesc0.TSR & TSR0_TERR) { 1605 wTSR = (u16)cpu_to_le32(td->tdesc0); 1606 /* if (td->tdesc0.TSR & TSR0_TERR) { BE */ 1607 if (wTSR & TSR0_TERR) { /* BE */ 1516 1608 stats->tx_errors++; 1517 1609 stats->tx_dropped++; 1518 if (td->tdesc0.TSR & TSR0_CDH) 1610 /* if (td->tdesc0.TSR & TSR0_CDH) BE */ 1611 if (wTSR & TSR0_CDH) /* BE */ 1519 1612 stats->tx_heartbeat_errors++; 1520 if (td->tdesc0.TSR & TSR0_CRS) 1613 /* if (td->tdesc0.TSR & TSR0_CRS) BE */ 1614 if (wTSR & TSR0_CRS) /* BE */ 1521 1615 stats->tx_carrier_errors++; 1522 if (td->tdesc0.TSR & TSR0_ABT) 1616 /* if (td->tdesc0.TSR & TSR0_ABT) BE */ 1617 if (wTSR & TSR0_ABT) /* BE */ 1523 1618 stats->tx_aborted_errors++; 1524 if (td->tdesc0.TSR & TSR0_OWC) 1619 /* if (td->tdesc0.TSR & TSR0_OWC) BE */ 1620 if (wTSR & TSR0_OWC) /* BE */ 1525 1621 stats->tx_window_errors++; 1526 1622 } else { 1527 1623 stats->tx_packets++; … … 1610 1706 1611 1707 static void velocity_error(struct velocity_info *vptr, int status) 1612 1708 { 1709 HAILS("velocity_error", status); 1613 1710 1614 1711 if (status & ISR_TXSTLI) { 1615 1712 struct mac_regs __iomem * regs = vptr->mac_regs; … … 1699 1796 struct sk_buff *skb = tdinfo->skb; 1700 1797 int i; 1701 1798 1799 HAIL("velocity_free_tx_buf"); 1702 1800 /* 1703 1801 * Don't unmap the pre-allocated tx_bufs 1704 1802 */ … … 1902 2000 struct velocity_td_info *tdinfo; 1903 2001 unsigned long flags; 1904 2002 int index; 2003 u32 lbufsz; /* BE */ 1905 2004 1906 2005 int pktlen = skb->len; 1907 2006 … … 1918 2017 td_ptr = &(vptr->td_rings[qnum][index]); 1919 2018 tdinfo = &(vptr->td_infos[qnum][index]); 1920 2019 1921 td_ptr->tdesc1.TCPLS = TCPLS_NORMAL; 1922 td_ptr->tdesc1.TCR = TCR0_TIC; 1923 td_ptr->td_buf[0].queue = 0; 2020 td_ptr->tdesc0 = 0x00000000UL; /* BE */ 2021 td_ptr->tdesc1 = 0x00000000UL; /* BE */ 2022 2023 /* td_ptr->tdesc1.TCPLS = TCPLS_NORMAL; BE */ 2024 td_ptr->tdesc1 &= cpu_to_le32(0xfcffffffUL); /* BE */ 2025 td_ptr->tdesc1 |= cpu_to_le32(((u32)TCPLS_NORMAL) << 24); /* BE */ 2026 2027 /* td_ptr->tdesc1.TCR = TCR0_TIC; BE */ 2028 td_ptr->tdesc1 |= cpu_to_le32(BE_TCR_TIC); /* BE */ 2029 2030 /* td_ptr->td_buf[0].queue = 0; BE */ 2031 td_ptr->td_buf[0].ltwo &= cpu_to_le32(~BE_QUEUE_ENABLE); /* BE */ 1924 2032 1925 2033 /* 1926 2034 * Pad short frames. … … 1932 2040 memset(tdinfo->buf + skb->len, 0, ETH_ZLEN - skb->len); 1933 2041 tdinfo->skb = skb; 1934 2042 tdinfo->skb_dma[0] = tdinfo->buf_dma; 1935 td_ptr->tdesc0.pktsize = pktlen; 2043 /* td_ptr->tdesc0.pktsize = pktlen; */ 2044 td_ptr->tdesc0 &= cpu_to_le32(0xc000ffffUL); /* BE */ 2045 lbufsz = pktlen; /* Assign, and make sure it's unsigned 32 bits - BE */ 2046 lbufsz = lbufsz << 16; /* BE - shift over */ 2047 td_ptr->tdesc0 |= cpu_to_le32(lbufsz); /* BE */ 2048 1936 2049 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]); 1937 td_ptr->td_buf[0].pa_high = 0; 1938 td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize; 2050 /* td_ptr->td_buf[0].pa_high = 0; */ 2051 /* td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize; */ 2052 td_ptr->td_buf[0].ltwo = cpu_to_le32(lbufsz); /* BE */ 1939 2053 tdinfo->nskb_dma = 1; 1940 td_ptr->tdesc1.CMDZ = 2; 2054 /* td_ptr->tdesc1.CMDZ = 2; */ 2055 td_ptr->tdesc1 &= cpu_to_le32(0x0fffffffUL); /* BE */ 2056 td_ptr->tdesc1 |= cpu_to_le32(((u32)0x2) << 28); /* BE */ 1941 2057 } else 1942 2058 #ifdef VELOCITY_ZERO_COPY_SUPPORT 2059 /* 2060 * BE - NOTE on the VELOCITY_ZERO_COPY_SUPPORT: 2061 * This block of code has NOT been patched up for BE support, as 2062 * it is certainly broken -- if it compiles at all. Since the BE 2063 * fixes depend on the broken code, attempts to convert to BE support 2064 * would almost certainly confuse more than help. 2065 */ 1943 2066 if (skb_shinfo(skb)->nr_frags > 0) { 1944 2067 int nfrags = skb_shinfo(skb)->nr_frags; 1945 2068 tdinfo->skb = skb; 1946 2069 if (nfrags > 6) { 1947 2070 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len); 1948 2071 tdinfo->skb_dma[0] = tdinfo->buf_dma; 2072 /* BE: Er, exactly what value are we assigning in this next line? */ 1949 2073 td_ptr->tdesc0.pktsize = 1950 2074 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]); 1951 2075 td_ptr->td_buf[0].pa_high = 0; … … 1962 2086 /* FIXME: support 48bit DMA later */ 1963 2087 td_ptr->td_buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma); 1964 2088 td_ptr->td_buf[i].pa_high = 0; 2089 /* BE: This next line can't be right: */ 1965 2090 td_ptr->td_buf[i].bufsize = skb->len->skb->data_len; 1966 2091 1967 2092 for (i = 0; i < nfrags; i++) { … … 1979 2104 } 1980 2105 1981 2106 } else 1982 #endif 2107 #endif /* (broken) VELOCITY_ZERO_COPY_SUPPORT */ 1983 2108 { 1984 2109 /* 1985 2110 * Map the linear network buffer into PCI space and … … 1987 2112 */ 1988 2113 tdinfo->skb = skb; 1989 2114 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE); 1990 td_ptr->tdesc0.pktsize = pktlen; 2115 /* td_ptr->tdesc0.pktsize = pktlen; BE */ 2116 td_ptr->tdesc0 &= cpu_to_le32(0xc000ffffUL); /* BE */ 2117 lbufsz = pktlen; /* Assign, and make sure it's unsigned 32 bits - BE */ 2118 lbufsz = lbufsz << 16; /* BE */ 2119 td_ptr->tdesc0 |= cpu_to_le32(lbufsz); /* BE */ 1991 2120 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]); 1992 td_ptr->td_buf[0].pa_high = 0; 1993 td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize; 2121 /* td_ptr->td_buf[0].pa_high = 0; BE */ 2122 /* td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize; BE */ 2123 td_ptr->td_buf[0].ltwo = cpu_to_le32(lbufsz); /* BE */ 2124 1994 2125 tdinfo->nskb_dma = 1; 1995 td_ptr->tdesc1.CMDZ = 2; 2126 /* td_ptr->tdesc1.CMDZ = 2; BE */ 2127 td_ptr->tdesc1 &= cpu_to_le32(0x0fffffffUL); /* BE */ 2128 td_ptr->tdesc1 |= cpu_to_le32(((u32)0x2) << 28);/* BE */ 1996 2129 } 1997 2130 1998 2131 if (vptr->flags & VELOCITY_FLAGS_TAGGING) { 1999 td_ptr->tdesc1.pqinf.VID = (vptr->options.vid & 0xfff); 2000 td_ptr->tdesc1.pqinf.priority = 0; 2001 td_ptr->tdesc1.pqinf.CFI = 0; 2002 td_ptr->tdesc1.TCR |= TCR0_VETAG; 2132 /* td_ptr->tdesc1.pqinf.priority = 0; BE */ 2133 /* td_ptr->tdesc1.pqinf.CFI = 0; BE */ 2134 td_ptr->tdesc1 &= cpu_to_le32(0xFFFF0000UL); /* BE */ 2135 /* td_ptr->tdesc1.pqinf.VID = (vptr->options.vid & 0xfff); BE */ 2136 td_ptr->tdesc1 |= cpu_to_le32((vptr->options.vid & 0xfff)); /* BE */ 2137 /* td_ptr->tdesc1.TCR |= TCR0_VETAG; BE */ 2138 td_ptr->tdesc1 |= cpu_to_le32(BE_TCR_VETAG); /* BE */ 2003 2139 } 2004 2140 2005 2141 /* … … 2009 2145 && (skb->ip_summed == CHECKSUM_PARTIAL)) { 2010 2146 const struct iphdr *ip = ip_hdr(skb); 2011 2147 if (ip->protocol == IPPROTO_TCP) 2012 td_ptr->tdesc1.TCR |= TCR0_TCPCK; 2148 /* td_ptr->tdesc1.TCR |= TCR0_TCPCK; BE */ 2149 td_ptr->tdesc1 |= cpu_to_le32(BE_TCR_TCPCK); /* BE */ 2013 2150 else if (ip->protocol == IPPROTO_UDP) 2014 td_ptr->tdesc1.TCR |= (TCR0_UDPCK); 2015 td_ptr->tdesc1.TCR |= TCR0_IPCK; 2016 } 2151 /* td_ptr->tdesc1.TCR |= (TCR0_UDPCK); BE */ 2152 td_ptr->tdesc1 |= cpu_to_le32(BE_TCR_UDPCK); /* BE */ 2153 /* td_ptr->tdesc1.TCR |= TCR0_IPCK; BE */ 2154 td_ptr->tdesc1 |= cpu_to_le32(BE_TCR_IPCK); /* BE */ 2155 } 2017 2156 { 2018 2157 2019 2158 int prev = index - 1; 2020 2159 2021 2160 if (prev < 0) 2022 2161 prev = vptr->options.numtx - 1; 2023 td_ptr->tdesc0.owner = OWNED_BY_NIC; 2162 /* td_ptr->tdesc0.owner = OWNED_BY_NIC; BE */ 2163 td_ptr->tdesc0 |= cpu_to_le32(BE_OWNED_BY_NIC); /* BE */ 2024 2164 vptr->td_used[qnum]++; 2025 2165 vptr->td_curr[qnum] = (index + 1) % vptr->options.numtx; 2026 2166 2027 2167 if (AVAIL_TD(vptr, qnum) < 1) 2028 2168 netif_stop_queue(dev); 2029 2169 2030 td_ptr = &(vptr->td_rings[qnum][prev]); 2031 td_ptr->td_buf[0].queue = 1; 2170 td_ptr = &(vptr->td_rings[qnum][prev]); 2171 /* td_ptr->td_buf[0].queue = 1; BE */ 2172 td_ptr->td_buf[0].ltwo |= cpu_to_le32(BE_QUEUE_ENABLE); /* BE */ 2173 if (vdebug&2) printk(KERN_NOTICE "velocity_xmit: (%s) len=%d idx=%d tdesc0=0x%x tdesc1=0x%x ltwo=0x%x\n", 2174 (pktlen<ETH_ZLEN) ? "short" : "normal", pktlen, index, 2175 td_ptr->tdesc0, td_ptr->tdesc1, td_ptr->td_buf[0].ltwo); 2032 2176 mac_tx_queue_wake(vptr->mac_regs, qnum); 2033 2177 } 2034 2178 dev->trans_start = jiffies; … … 2054 2198 u32 isr_status; 2055 2199 int max_count = 0; 2056 2200 2057 2201 HAIL("velocity_intr"); 2058 2202 spin_lock(&vptr->lock); 2059 2203 isr_status = mac_read_isr(vptr->mac_regs); 2060 2204 … … 2073 2217 2074 2218 while (isr_status != 0) { 2075 2219 mac_write_isr(vptr->mac_regs, isr_status); 2076 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI))) 2220 HAILS("velocity_intr",isr_status); 2221 /* MJW - velocity_error is ALWAYS called; need to mask off some other flags */ 2222 /* if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI))) */ 2223 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI | ISR_PTX0I | ISR_ISR0))) 2077 2224 velocity_error(vptr, isr_status); 2078 2225 if (isr_status & (ISR_PRXI | ISR_PPRXI)) 2079 2226 max_count += velocity_rx_srv(vptr, isr_status); … … 2111 2258 int i; 2112 2259 struct dev_mc_list *mclist; 2113 2260 2261 HAIL("velocity_set_multi"); 2114 2262 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ 2115 2263 writel(0xffffffff, ®s->MARCAM[0]); 2116 2264 writel(0xffffffff, ®s->MARCAM[4]); … … 2154 2302 { 2155 2303 struct velocity_info *vptr = netdev_priv(dev); 2156 2304 2305 HAIL("net_device_stats"); 2157 2306 /* If the hardware is down, don't touch MII */ 2158 2307 if(!netif_running(dev)) 2159 2308 return &vptr->stats; … … 2198 2347 struct velocity_info *vptr = netdev_priv(dev); 2199 2348 int ret; 2200 2349 2350 HAIL("velocity_ioctl"); 2201 2351 /* If we are asked for information and the device is power 2202 2352 saving then we need to bring the device back up to talk to it */ 2203 2353 … … 2416 2566 { 2417 2567 u16 ww; 2418 2568 2569 HAIL("velocity_mii_read"); 2419 2570 /* 2420 2571 * Disable MIICR_MAUTO, so that mii addr can be set normally 2421 2572 */ … … 2452 2603 { 2453 2604 u16 ww; 2454 2605 2606 HAIL("velocity_mii_write"); 2455 2607 /* 2456 2608 * Disable MIICR_MAUTO, so that mii addr can be set normally 2457 2609 */ -
linux-2.6.22-rc1-arm/drivers/net/via-velocity.h
old new 196 196 * Receive descriptor 197 197 */ 198 198 199 struct rdesc0 {200 u16 RSR; /* Receive status */201 u16 len:14; /* Received packet length */202 u16 reserved:1;203 u16 owner:1; /* Who owns this buffer ? */204 };205 206 struct rdesc1 {207 u16 PQTAG;208 u8 CSM;209 u8 IPKT;210 };199 //struct rdesc0 { 200 // u16 RSR; /* Receive status */ 201 // u16 len:14; /* Received packet length */ 202 // u16 reserved:1; 203 // u16 owner:1; /* Who owns this buffer ? */ 204 //}; 205 206 //struct rdesc1 { 207 // u16 PQTAG; 208 // u8 CSM; 209 // u8 IPKT; 210 //}; 211 211 212 212 struct rx_desc { 213 struct rdesc0 rdesc0; 214 struct rdesc1 rdesc1; 213 // struct rdesc0 rdesc0; 214 // struct rdesc1 rdesc1; 215 u32 rdesc0; 216 u32 rdesc1; 215 217 u32 pa_low; /* Low 32 bit PCI address */ 216 u16 pa_high; /* Next 16 bit PCI address (48 total) */ 217 u16 len:15; /* Frame size */ 218 u16 inten:1; /* Enable interrupt */ 218 // u16 pa_high; /* Next 16 bit PCI address (48 total) */ 219 // u16 len:15; /* Frame size */ 220 // u16 inten:1; /* Enable interrupt */ 221 u32 ltwo; 219 222 } __attribute__ ((__packed__)); 220 223 221 224 /* 222 225 * Transmit descriptor 223 226 */ 224 227 225 struct tdesc0 {226 u16 TSR; /* Transmit status register */227 u16 pktsize:14; /* Size of frame */228 u16 reserved:1;229 u16 owner:1; /* Who owns the buffer */230 };231 232 struct pqinf { /* Priority queue info */233 u16 VID:12;234 u16 CFI:1;235 u16 priority:3;236 } __attribute__ ((__packed__));237 238 struct tdesc1 {239 struct pqinf pqinf;240 u8 TCR;241 u8 TCPLS:2;242 u8 reserved:2;243 u8 CMDZ:4;244 } __attribute__ ((__packed__));228 //struct tdesc0 { 229 // u16 TSR; /* Transmit status register */ 230 // u16 pktsize:14; /* Size of frame */ 231 // u16 reserved:1; 232 // u16 owner:1; /* Who owns the buffer */ 233 //}; 234 235 //struct pqinf { /* Priority queue info */ 236 // u16 VID:12; 237 // u16 CFI:1; 238 // u16 priority:3; 239 //} __attribute__ ((__packed__)); 240 241 //struct tdesc1 { 242 // struct pqinf pqinf; 243 // u8 TCR; 244 // u8 TCPLS:2; 245 // u8 reserved:2; 246 // u8 CMDZ:4; 247 //} __attribute__ ((__packed__)); 245 248 246 249 struct td_buf { 247 250 u32 pa_low; 248 u16 pa_high; 249 u16 bufsize:14; 250 u16 reserved:1; 251 u16 queue:1; 251 // u16 pa_high; 252 // u16 bufsize:14; 253 // u16 reserved:1; 254 // u16 queue:1; 255 u32 ltwo; 252 256 } __attribute__ ((__packed__)); 253 257 254 258 struct tx_desc { 255 struct tdesc0 tdesc0; 256 struct tdesc1 tdesc1; 259 // struct tdesc0 tdesc0; 260 // struct tdesc1 tdesc1; 261 u32 tdesc0; 262 u32 tdesc1; 257 263 struct td_buf td_buf[7]; 258 264 }; 259 265 … … 279 285 OWNED_BY_NIC = 1 280 286 }; 281 287 288 /* Constants added for the BE fixes */ 289 #define BE_OWNED_BY_NIC 0x80000000UL 290 #define BE_INT_ENABLE 0x80000000UL 291 #define BE_QUEUE_ENABLE 0x80000000UL 292 #define BE_TCR_TIC 0x00800000UL 293 #define BE_TCR_VETAG 0x00200000UL 294 #define BE_TCR_TCPCK 0x00040000UL 295 #define BE_TCR_UDPCK 0x00080000UL 296 #define BE_TCR_IPCK 0x00100000UL 297 282 298 283 299 /* 284 300 * MAC registers and macros. … … 1698 1714 }; 1699 1715 1700 1716 struct velocity_opt { 1717 int velo_debug; /* debug flag */ 1701 1718 int numrx; /* Number of RX descriptors */ 1702 1719 int numtx; /* Number of TX descriptors */ 1703 1720 enum speed_opt spd_dpx; /* Media link mode */
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